Low Jitter and Multirate Clock and Data Recovery Circuit Using A Msadll for Chip-to-Chip Interconnection

By: Material type: ArticleArticleDescription: 2356-2364 pSubject(s): In: Ieee Transactions on Circuits and Systems, I: Fundamental Theory and Applications
Holdings
Item type Current library Call number Vol info Status Date due Barcode
Articles Articles Periodical Section Vol.51, No.12 (Dec. 2004) Available