Your search returned 7 results.

Sort
Results
onOptimal Design of Multiple-Valued Plas by
  • Sasao, Tsutomu
Source: IEEE Transactions on Computers
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
A Shared-Well Dual-Supply-Voltage 64-Bit Alu by
  • Shimazaki, Yasuhisa
  • Zlatanovici, Radu
  • Nikolic, Borivoje
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Binary Adders of Multigate Single-Electron Transistors: Specific Design Using Pass-Transistor Logic by
  • ono, Yukinori
Source: Ieee Transactions on Nanotechnology
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Low-Power High-Performance Arithmetic Circuits and Architectures by
  • Fahim, Amr M
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
The Design of Hybrid Carry-Lookahead/ Carry-Select Adders by
  • Wang, Y
  • Pai, W. C
Source: Ieee Transactions on Circuits and Systems-Ii: Express Briefs ( for merly: Analog & Digital Signal Processing)
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Clock-Delayed Domino for Dynamic Circuit Design. by
  • Sechen, C
  • Yee, G
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Threshold Logic Circuit Design of Parallel Adders Using Resonant Tunneling Devices. by
  • Burwick, C
  • Auer, U
  • Pacha, C
Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Pages