Threshold Logic Circuit Design of Parallel Adders Using Resonant Tunneling Devices.

By: Material type: ArticleArticleDescription: 558-572 pSubject(s): In: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
Holdings
Item type Current library Call number Vol info Status Date due Barcode
Articles Articles Periodical Section Vol.08, No.05 (Oct. 2000) Available