A Dynamically Reconfigurable Interconnect for Array Processors. (Record no. 796972)

MARC details
000 -LEADER
fixed length control field 00477nab a2200145Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s1998 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name John, E
9 (RLIN) 855636
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name John, L.K
9 (RLIN) 855637
245 #2 - TITLE STATEMENT
Title A Dynamically Reconfigurable Interconnect for Array Processors.
300 ## - PHYSICAL DESCRIPTION
Extent 150-157 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Array Processor
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Network Embedding
9 (RLIN) 855638
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 1998
Title Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
International Standard Serial Number 10638210
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.06, No.01 (Mar. 1998)   20/08/2023 Articles