000			00422nab a2200133Ia 4500
008			230808s1997 |||||||f |||| 00| 0 eng d
100			_aHsiao, J. H _9858056
100			_aChen, C. T _9858057
100			_aChen, L. G _9764781
245		2	_aA Bit-Level Pipelined Vlsi Rchitectures for Running Order Algorithm.
300			_a2140-2144 p.
773			_d1997 _tIeee Transactions on Signal Processing _x1053587X
942			_cART _o51 _pABUL KALAM Library
999			_c799307 _d799307