000 00479nab a2200133Ia 4500
008 230808s1997 |||||||f |||| 00| 0 eng d
100 _aZurawski, R
_9857896
245 0 _aVerifying Correctness of Interfaces of Design Models of Manufacturing Systems Using Functional Abstractions.
300 _a307-320 p.
650 _a for mal Verification
_9786846
650 _aTemporal Logic
_9774285
773 _d1997
_tIEEE Transactions on Industrial Electronics
_x02780046
942 _cART
_o51
_pABUL KALAM Library
999 _c799165
_d799165