000			00522nab a2200145Ia 4500
008			230808s1998 |||||||f |||| 00| 0 eng d
100			_aMiyazaki, T _9765073
100			_aTsutsui, A _9855646
245		0	_aAnt-on Yards: Fpga/Mpu Hybrid Architecture for Telecommunications Data Processing.
300			_a199-211 p.
650			_aCodesign _9835648
650			_aField Programmable Gate Arrary (Fpga) _9748879
773			_d1998 _tIeee Transactions on Very Large Scale Intergration (Vlsi) Systems _x10638210
942			_cART _o51 _pABUL KALAM Library
999			_c796978 _d796978