000 00522nab a2200157Ia 4500
008 230808s2002 |||||||f |||| 00| 0 eng d
100 _aCheng, Chaing - Ho
_9820712
100 _aPedram, M
_9815747
245 0 _aPower-Optimal Encoding for A Dram Address Bus
300 _a109-118 p.
650 _aAddress Bus Coding
_9820713
650 _aBus Activity Minimization
_9820714
650 _aDramatic
_9817332
773 _d2002
_tIeee Transactions on Very Large Scale Intergration (Vlsi) Systems
_x10638210
942 _cART
_o51
_pABUL KALAM Library
999 _c771577
_d771577