000 00517nab a2200145Ia 4500
008 230808s2005 |||||||f |||| 00| 0 eng d
100 _aJaussi, James E.
_9801358
100 _aBalamurugan, S.
_9801359
245 0 _a8-Gb/S Source-Synchronous I/O Link with Adaptive Receiver Equalization offset Cancellation and Clock De-Skew
300 _a80-88 p.
650 _aAdaptive Equalizer
_9677383
650 _aAnalog Equalization
_9801361
773 _d2005
_tIeee Journal of Solid-State Circuits
_x00189200
942 _cART
_o51
_pABUL KALAM Library
999 _c756441
_d756441