000			00517nab a2200157Ia 4500
008			230808s2000 |||||||f |||| 00| 0 eng d
100			_aAnand, M. _9768472
100			_aKakumu, Masakazu _9768473
100			_aShibata, Hideki _9768474
245		0	_aOptimization Study of Vlsi Interconnect Parameters
300			_a178-186 p.
650			_aIntergrated Circuit Design _9768475
650			_aIntegrated Circuit Metalilzation _9768476
773			_d2000 _tIEEE Transactions on Electron Devices _x00189383
942			_cART _o51 _pABUL KALAM Library
999			_c740359 _d740359