| 000 | 00634nab a2200157Ia 4500 | ||
|---|---|---|---|
| 008 | 230808s2014 |||||||f |||| 00| 0 eng d | ||
| 100 |
_aPabdian, M. Karthigai _9708226 |
||
| 100 | _aBalamurugan, N. B. | ||
| 245 | 0 | _aAnalytical Threshold Voltage Modeling of Surrounding Gate Ksilicon Nanowire Transistors with Didfferent Geometries | |
| 300 | _a2079-2088 p. | ||
| 650 |
_aJunction Based Cylindrical Surrounding Gate Silicon Nanowire Transistor _9708227 |
||
| 650 |
_aDrain Bias _9708228 |
||
| 650 |
_aChannel Length Modulation _9708229 |
||
| 773 |
_d2014 _tJournal of Electrical Engineering and Technology _x19750102 |
||
| 942 |
_cART _o51 _pABUL KALAM Library |
||
| 999 |
_c712475 _d712475 |
||