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		Verification of A Network Asic Component Using Bounded Model Checking by Sun, X Song, X Wu, J Xie, F Source: International Journal of Electronics Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Funstate-An Internal Design Representation for Codesign by Strehl, K Thiele, L Gries, M Ziegenbein, D Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		A for mal Specification and Verification Frame Work for Time Wrap Based Parallel Simulation by Frey, D Source: Ieee Transactions on Software Engineering Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		for mal Specification and Verification of Tcp Selective Aknowledgment by Smith, M Ramakrishnan, K. K Source: Ieee/Acm Transactions on Networking Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		for mal Verfication of Commercial Integrated Circuits by Pixley, Carl Source: Ieee Design and Test of Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Verifying Correctness of Interfaces of Design Models of Manufacturing Systems Using Functional Abstractions. by Zurawski, R Source: IEEE Transactions on Industrial Electronics Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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