Your search returned 3 results.

Sort
Results
An on-Chip Esd Protection Circuit with Low Trigger Voltage in Bicmos Technology by
  • Wang, Albert Z. H
  • Tsay, Chen-Hui
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Improved Output Esd Protection by Dynamic Gate Floating Design by
  • Chang, Hun Hsien
  • Ker, M D
Source: IEEE Transactions on Electron Devices
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
A 0.8 -Db Nf Esd-Protected 9-Mw Cmos Lna Operating At 1.23 Ghz by
  • Lerous, P
  • Janssens, J
  • Steyaert, M. S. J
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Pages