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A 0.9-V 12-Mw 5-Msps Algorithmic Adc with 77-Db Sfdr by
  • li, Jipeng
  • Ahn, Gil-Cho
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
A 1.8-V 67-Mw 10-Bit 100-Ms/S Pipelined Adc Using Time-Shifted Cds Techniue by
  • Li, Jipeng
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Radix-Based Digital Calibration Techniques for Multi-Stagerecycling Pipelined Adcs by
  • Chang, Dong-Young
  • Li, Jipeng
Source: Ieee Transactions on Circuits and Systems, I: Fundamental Theory and Applications
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
Background Calibration Techniques for Multistage Pipelined Adcs with Digital Redundancy by
  • Li, Jipeng
Source: Ieee Transactions on Circuits and Systems-Ii: Express Briefs ( for merly: Analog & Digital Signal Processing)
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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