Abstract :

A number of issues have emerged due to the use of multicore processors or chip multiprocessors as the mainstream processors. These issues include the problem of memory wall which is more prominent in multicore processors as all the processor cores on a single chip share the same processor memory interface and parallelism is not present at all levels of memory hierarchy. This issue needs to be addressed to gain from the innovation of having many cores on the same chip. The issue of memory wall is the focus of this PhD project with the intention of finding a possible solution that is also scalable. It is recommended that the solution should involve both hardware and software that form the various levels of execution environment. The main contribution of this PhD project is the design and implementation of a framework where an operating system feature is combined with a cache optimization technique to alleviate the memory wall problem in chip multiprocessors. As a realization of the framework, the cache optimization technique of hardware prefetching is combined with the operating system support of huge pages to improve the performance of memory in multicore processors. In addition, a detailed investigation was carried out for performance improvement of multicore processors with the selective use of hardware prefetchers in multicore processors in order to reduce interference between demand and prefetch requests that are generated simultaneously by all the cores. Moreover, additional features of the operating system has been identified that can be combined with cache optimizations to further alleviate the memory performance issue in chip multiprocessors.