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		A 50-Mw/Ch 2.5-Gb/S/Ch Data Recovery Circuit for Sfi-5 Interface with Digital Eye-Tracking by Miki, Yoshio Saito, Tatsuya Baba, Takashige Source: Ieee Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Challlenges InHigh-Speed Clock and Data Recovery Circuits by Razavi, Behzad Source: Ieee Communications Magazine Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		A 900-Mb/S Cmos Data Recovery Dll Using Half-Frequency Clock by Maillard, Xavier Devisch, Frederic Kuijk, Maarten Source: Ieee Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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