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		Tram: a Design Methodology for High-Performance, Easily Testable, Multimegabit Rams by Pradhan, Dhiraj K Jarwala, Najmi T Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Paraliel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories by Mazumder, P Patel, Janak K Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Parallel Testing of Multi-Port Static Random Access Memories by Karimi, F Source: Microelectronics Journal Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		An on-Chip March Pattern Generator for Testing Embedded Memory Cores by W., Li Lee, K. J Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Testing Logic-Intensive Memory Ics on Memory Testers. by Wheelus, Richard Gerner, Jerry Wu, Robert Source: Ieee Design and Test of Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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