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		A Fuliy Integrated Sige Receiver Ic for 10-Gb/S Data Rate by Greshishchev, Yuriy M Source: IEEE Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Sige Bicmos 3.3-V Clock and Data Recovery Circuits for 10-Gb/S Serial Transmission System by Meghelil, Mounir Source: IEEE Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Sige Clock and Data Recovery Ic with linear-Type Pli for 10-Gh/S Sonet Application by Greshishchev, Yuriy M Source: IEEE Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		A 10-Gb/S Data-Pattern Independent Clock and Data Recovery Circuit with A Two-Mode Phase Comparator by Ishii, Kiyoshi Enoki, Takatomo Shibata, Tsugumichi Source: Ieee Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		40-43-Gb/S Oc-768 16:1 Mux/Cmu Chipset with Sfi-5 Compliance by Tao, Hai Shaeffer, Derek K Xu, Min Source: Ieee Journal of Solid-State Circuits Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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