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on Detecting Delay Faults Using Time-To-Digital Converter Embedded in Boundary Scan by
  • Yotsuyanagi, Hiroyuki
  • Makimoto, Hiroyuki
Source: IEICE Transactions on Information and Systems
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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A High-Resolution Cmos Time-To-Digital Converter Utilizing a Vernier Delay line by
  • Dudek, Piotr
  • Szczepanski, Stanislaw
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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