A1-Gd/S/Pin 512-Mb Ddrii Sdram Uaing A Digital Dll and A Slew -Rate-Controlled Output Buffer

By: Material type: ArticleArticleDescription: 762-768 pSubject(s): In: Ieee Journal of Solid-State Circuits
Holdings
Item type Current library Call number Vol info Status Date due Barcode
Articles Articles Periodical Section Vol.38, No.05 (May. 2003) Available