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		Built-In Checking OfCorrect Self-Test Signature by Mcanney, Wililam H Savir, J Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Random Pattern Testability of Delay Faults by Savir, J Mcanney, Wililam H Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		The Weighted Syndrome Sums Approach to Vlsi Testing by Savir, J Barzilai, Zeev Markowsky, George Smith, Merlin G Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Test Limitations of Parametric Faults in Analog Circuits by Savir, J Guo, Z Source: Ieee Transactions on Instrumentation and Measurement Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Redundancy Revisited. by Savir, J Source: Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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