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		Extending Integrated-Circuit Yield-Models to Estimate Early-life Reliability by Singh, Adit D Nelson, Victor P Source: IEEE Transactions on Reliability Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Interstitial Redundancy: an Area Efficient Fault Tolerance Scheme for Large Area Vlsi Processor Arrays by Singh, Adit D Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		on Implementing Large Binary Tree Architectures in Vlsi and Wsi by Youn, Hee Yong Singh, Adit D Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article
		Tree Structured Sequential Multiple-Valued Logic Design from Universal Modules by Singh, Adit D Armstrong, J Source: IEEE Transactions on Computers Material type: Article; Format: print Availability: Items available for loan: Engr Abul Kalam Library (1). Request article

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