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A 500-Mb/S Quadruple Data Tate Sdram Interface Using a Skew Canceliation Technique by
  • Wang, Sung Ho
  • Nam, Hyoung Sik
  • Kim, Beomsup
  • Ahn, K
Source: IEEE Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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A 1.8-V 700-Mb/S/Pin 512-Mb Ddr-Ii Sdram with on-Die Termintion and off-Chip Driver Calibration by
  • Yoo, Changsil
  • Kyung, Kye-Hyun
Source: Ieee Journal of Solid-State Circuits
Material type: Article Article; Format: print
Availability: Items available for loan: Engr Abul Kalam Library (1).
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