Friedman, Daniel Rhee, Woogeun Parker, Benjamin <br/><br/>
A Semi Digital Delay Locked Loop Using An Analog Based Finite State Machine 

 - 635-639 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Clock and Data Recovery<br/>Phase-Locked Loop (Pll)<br/>Phase Interpolation