Bolchini, C Buonanno, G. Buonanno, Giacomo <br/><br/>
A Wafer Level Testability Approach Based on an Improved Scan Insertion Technique 

 - 438-447 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Wafer<br/>Approach<br/>Insertion  for ce