Dudek, Piotr Szczepanski, Stanislaw <br/><br/>
A High-Resolution Cmos Time-To-Digital Converter Utilizing a Vernier Delay line 

 - 240-247 p. 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Delay-Locked Loop<br/>Time of Flight<br/>Time-To-Digital Converter