Abstract :

Scalability issues of semiconductor memories have accelerated the research for alternative technologies. Memristors is one of the most promising candidates for replacing such memories used in computers because of their high density and zero static power dissipation. However, if memristors are to replace memories on processor chip, their physical noisiness and variability due to process variation pose a risk of increasing execution times of programs.
The goal of this research is to bring the highly dense memristors within the memories present on processor chip to increase their capacity thereby ensuring that there is no compromise on processor efficiency and throughput. Memristor crossbar is used which is the most dense structure for memory and a Hybrid CMOS-memristor memory is designed named MemCAM. The paradigm for using MemCAM with the processor has also been proposed and simulated and the results validate the efficacy of the designed cell and proposed architectural change.
Application of memristors is also explored in the area of Hardware Transactional Memory (HTM) which is a topic of broad and current interest. Hybrid Memristor-CMOS memory cell for both the instruction and data cache of an HTM system is designed that enables efficient operation with minimal overhead on area and power consumption.
The beneficiaries of this research are the researchers engaged in exploring the applications of resistive memories in general and Computer and Memory System Designers in particular. It is hoped that this research will prove to be a milestone in enabling the development of next generation computing systems.