Power Modeling for high-Level Architecture for Multi-Fpga System. (Record no. 795705)
[ view plain ]
000 -LEADER | |
---|---|
fixed length control field | 00450nab a2200121Ia 4500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 230808s1998 |||||||f |||| 00| 0 eng d |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Gupta, S |
9 (RLIN) | 775117 |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Najm, F. N |
9 (RLIN) | 822494 |
245 #0 - TITLE STATEMENT | |
Title | Power Modeling for high-Level Architecture for Multi-Fpga System. |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 18-29 p. |
773 ## - HOST ITEM ENTRY | |
Place, publisher, and date of publication | 1998 |
Title | Ieee Transactions on Circuits and Systems-Ii: Express Briefs ( for merly: Analog & Digital Signal Processing) |
International Standard Serial Number | 10577130 |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Articles |
-- | 51 |
-- | ABUL KALAM Library |
Not for loan | Home library | Serial Enumeration / chronology | Total Checkouts | Date last seen | Koha item type |
---|---|---|---|---|---|
Engr Abul Kalam Library | Vol.45, No.04 (Apr. 1998) | 20/08/2023 | Articles |