A Memory-Based Architecture for Mpeg2 System Protocol Lsi'S. (Record no. 794031)

MARC details
000 -LEADER
fixed length control field 00498nab a2200145Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s1999 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Inamori, Minoru
9 (RLIN) 852580
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Namganuma, Jiro
9 (RLIN) 852582
245 #2 - TITLE STATEMENT
Title A Memory-Based Architecture for Mpeg2 System Protocol Lsi'S.
300 ## - PHYSICAL DESCRIPTION
Extent 339-344 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Embadded System
9 (RLIN) 822303
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Protocol Processing
9 (RLIN) 852584
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 1999
Title Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
International Standard Serial Number 10638210
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
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