Clock-Gating and Its Application to Low Power Design of Sequential Circuits (Record no. 785557)

MARC details
000 -LEADER
fixed length control field 00475nab a2200157Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2000 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Pedram, M
9 (RLIN) 815747
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Wu, X.
9 (RLIN) 746268
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Wu, Q
9 (RLIN) 815749
245 #0 - TITLE STATEMENT
Title Clock-Gating and Its Application to Low Power Design of Sequential Circuits
300 ## - PHYSICAL DESCRIPTION
Extent 415-419 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Clocks
9 (RLIN) 757028
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Low Power
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2000
Title Ieee Transactions on Circuits and Systems
International Standard Serial Number 00984094
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.47, No.03 (Mar. 2000)   20/08/2023 Articles