Optimal N-Tier Multilevel Interconnect Architecture for Gigascale Integration(Gsi0 (Record no. 775445)

MARC details
000 -LEADER
fixed length control field 00505nab a2200145Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2001 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Venkatesh, G
9 (RLIN) 792241
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Davison, J. B
9 (RLIN) 823556
245 #0 - TITLE STATEMENT
Title Optimal N-Tier Multilevel Interconnect Architecture for Gigascale Integration(Gsi0
300 ## - PHYSICAL DESCRIPTION
Extent 899-912 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Introduction
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Multilevel Rectifier
9 (RLIN) 821917
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2001
Title Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
International Standard Serial Number 10638210
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
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-- ABUL KALAM Library
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  Engr Abul Kalam Library Vol.09, No.06 (Dec. 2001)   19/08/2023 Articles