Unifying Simulation and Execution in A Design Environment for Fpga Systems (Record no. 773844)

MARC details
000 -LEADER
fixed length control field 00568nab a2200157Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2001 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Hutchings, B. L.
9 (RLIN) 823437
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Nelson, B. E.
9 (RLIN) 823438
245 #0 - TITLE STATEMENT
Title Unifying Simulation and Execution in A Design Environment for Fpga Systems
300 ## - PHYSICAL DESCRIPTION
Extent 201-204 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Debug
9 (RLIN) 823439
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Field Programmable Gate Arrary (Fpga)
9 (RLIN) 748879
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Reconfigurable Computing
9 (RLIN) 713821
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2001
Title Ieee Transactions on Very Large Scale Intergration (Vlsi) Systems
International Standard Serial Number 10638210
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.09, No.01 (Feb. 2001)   19/08/2023 Articles