An Implmentable Parallel Schedular for Inpu-Queed Switches (Record no. 769418)

MARC details
000 -LEADER
fixed length control field 00409nab a2200121Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2002 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Giacomelli, J.E
9 (RLIN) 817573
245 #3 - TITLE STATEMENT
Title An Implmentable Parallel Schedular for Inpu-Queed Switches
300 ## - PHYSICAL DESCRIPTION
Extent 19-25 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Apsara Algorithms
9 (RLIN) 817575
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2002
Title Ieee Micro:The Magazine for Chip & Silicon Systems Designers
International Standard Serial Number 02721732
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.22, No.01 (Jan. 2002)   19/08/2023 Articles