A High-Resolution Cmos Time-To-Digital Converter Utilizing a Vernier Delay line (Record no. 740712)

MARC details
000 -LEADER
fixed length control field 00537nab a2200157Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2000 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Dudek, Piotr
9 (RLIN) 769467
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Szczepanski, Stanislaw
9 (RLIN) 769468
245 #2 - TITLE STATEMENT
Title A High-Resolution Cmos Time-To-Digital Converter Utilizing a Vernier Delay line
300 ## - PHYSICAL DESCRIPTION
Extent 240-247 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Delay-Locked Loop
9 (RLIN) 768988
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Time of Flight
9 (RLIN) 752903
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Time-To-Digital Converter
9 (RLIN) 715176
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2000
Title IEEE Journal of Solid-State Circuits
International Standard Serial Number 00189200
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.35, No.02 (Feb. 2000)   19/08/2023 Articles