Design and Verification of Improved Cascaded Multilevel Inverter Topology with Asymmetric Dc Sources (Record no. 705519)

MARC details
000 -LEADER
fixed length control field 00628nab a2200169Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230808s2019 |||||||f |||| 00| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Tarmizi, Tarmizi
9 (RLIN) 166614
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Taib, Soib
9 (RLIN) 166613
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Desa, M.K. Mat
9 (RLIN) 166612
245 #0 - TITLE STATEMENT
Title Design and Verification of Improved Cascaded Multilevel Inverter Topology with Asymmetric Dc Sources
300 ## - PHYSICAL DESCRIPTION
Extent 1074-1086 p.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element H-Bridge
9 (RLIN) 166616
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Multilevel Inverter
9 (RLIN) 165422
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name entry element Asymmetric Source
9 (RLIN) 166615
773 ## - HOST ITEM ENTRY
Place, publisher, and date of publication 2019
Title Journal of Power Electronics: a Publication of Korean Institute of Power Electronics
International Standard Serial Number 15982092
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Articles
-- 51
-- ABUL KALAM Library
Holdings
Not for loan Home library Serial Enumeration / chronology Total Checkouts Date last seen Koha item type
  Engr Abul Kalam Library Vol.19, No.05 (Sep. 2019)   19/08/2023 Articles