on-Chip Esd Protection Design with Substrate-Triggered Technique for Mixed-Voltage I/O Circuits in Subquarter-Micrometer Cmos Process
Ker, Ming-Dou Chuang, Chien-Hui Lin, Kun-Hsien
on-Chip Esd Protection Design with Substrate-Triggered Technique for Mixed-Voltage I/O Circuits in Subquarter-Micrometer Cmos Process - 1628-1636 p.
Electrostatic Discharge (Esd)
Esd Protection Circuit
on-Chip Esd Protection Design with Substrate-Triggered Technique for Mixed-Voltage I/O Circuits in Subquarter-Micrometer Cmos Process - 1628-1636 p.
Electrostatic Discharge (Esd)
Esd Protection Circuit